small form factor copyright ? 2005 by silicon laboratories 5.5.2005 port 0 latch uart 8 kb flash 256 byte sram por sfr bus 8 0 5 1 c o r e timer 0, 1, 2, 3 3-chnl pca/ wdt 10-bit 200 ksps adc a m u x ain0-ain15 p 0 d r v vdd x b a r reset xt al1 xt al2 external oscillator circuit system clock 24.5 mhz (2%) internal oscillator analog/digital power debug hw vref smbus c2d c2d cp0 + - temp p0.0/vref p0.1/idac p0.2/xtal1 p0.3/xtal2 p0.4/tx p0.5/rx p0.6/cnvst p0.7 vdd gnd rst/c2ck brown- out p 1 d r v p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 spi port 1 latch 512 byte xram p2.0/c2d port 2 latch vref 80khz internal oscillator 10-bit dac idac C8051F330D 25 mips, 8 kb flash, 10-bit ad c, 20-pin mixed-signal mcu analog peripherals 10-bit adc - programmable throughput up to 200 ksps - up to 16 external inputs; programmable as single-ended or differential - reference from internal v ref , v dd , or external pin - internal or external start of conversion sources - built-in temperature sensor (3 c) 10-bit dac (current mode) comparator - programmable hysteresis and response time - configurable to generate interrupts or reset - low current (0.4 a) on-chip debug - on-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) - provides breakpoints, single stepping, watchpoints - inspect/modify memory, registers, and stack - superior performance to emulation systems using ice-chips, target pods, and sockets supply voltage: 2.7 to 3.6 v - typical operating current: 6.4 ma at 25 mhz 9 a at 32 khz - typical stop mode current: <0.1 a temperature range: ?40 to +85 c high-speed 8051 c core - pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - up to 25 mips throughput with 25 mhz clock - expanded interrupt handler memory - 768 bytes data ram - 8 kb flash; in-system programmable in 512 byte sectors (512 bytes are reserved) digital peripherals - 17 port i/o; all are 5 v tolerant - hardware smbus? (i2c? compatible), spi?, and uart serial ports available concurrently - programmable 16-bit counter/timer array with three capture/compare modules, wdt - 4 general-purpose 16-bit counter/timers - real-time clock mode using pca or timer and external clock source clock sources - two internal oscillators: - 24.5 mhz, 2% accuracy supports uart operation - 80 khz low frequency, low-power - external oscillator: crystal, rc, c, or clock (1 or 2 pin modes) - can switch between clock sources on-the-fly package - 20-pin dip ( l ead-free package) ordering part numbers - C8051F330D-gp
small form factor copyright ? 2005 by silicon laboratories 5.5.2005 silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned her ein are trademarks or registered tr ademarks of their respective holders C8051F330D 25 mips, 8 kb flash, 10-bit ad c, 20-pin mixed-signal mcu selected electri cal specifications (t a = ?40 to +85 c, vdd = 2.7 v unless otherwise specified) parameter conditions min typ max units global characteristics supply voltage 2.7 3.6 v supply current with cpu active clock = 25 mhz clock = 1 mhz clock = 80 khz; v dd monitor disabled clock = 32 khz; v dd monitor disabled 6.4 0.36 20 9 ma ma a a supply current (shutdown) oscillator off; v dd monitor disabled <0.1 a clock frequency range dc 25 mhz internal oscillators frequency (osc0) 24.0 24.5 25.0 mhz frequency (osc1) note 1 80 khz a/d converter resolution 10 bits integral nonlinearity ? 1 lsb differential nonlinearity guaranteed monotonic ? 1 lsb signal-to-noise plus distortion 53 55.5 db throughput rate 200 ksps input voltage range 0 v ref v d/a converter resolution 10 bits integral nonlinearity ? lsb differential nonlinearity guaranteed monotonic ? 1 lsb output settling time 5 s comparator response time mode0 (cp+) ? (cp-) = 100 mv 0.1 s current consumption mode0 7.6 a response time mode1 (cp+) ? (cp-) = 100 mv 0.18 s current consumption mode1 3.2 a response time mode2 (cp+) ? (cp-) = 100 mv 0.32 s current consumption mode2 1.3 a response time mode3 (cp+) ? (cp-) = 100 mv 1 s current consumption mode3 0.4 a package information 1 20 pin 1 identifier e1 e b2 b a1 d1 d1 a2 a l b3 d e ea eb ec 0.015" b pin dimensions (bottom view) b1 c1 c side view side view top view base metal inches min typ max a0.210 a1 0.015 a2 0.115 0.130 0.195 b 0.014 0.018 0.022 b1 0.014 0.018 0.020 b2 0.045 0.060 0.070 b3 0.030 0.039 0.045 c .008 0.010 0.014 c1 0.008 0.010 0.011 d 0.980 1.030 1.060 d1 0.005 e 0.300 0.310 0.325 e1 0.240 0.250 0.280 e 0.100 ea 0.300 eb 0.430 ec 0.000 0.060 l 0.115 0.130 0.150 C8051F330Dk development kit note 1: osc1 can be calibrated in 2.5% st eps using an internal calibration register.
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